Regviz

Espressif Systems /ESP32-P4 /ISP /HIST_SEG2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as HIST_SEG2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-P4/ISP/HIST_SEG2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HIST_SEG_11_120HIST_SEG_10_110HIST_SEG_9_100HIST_SEG_8_9

Description

histogram bin control register 2

Fields

HIST_SEG_11_12

this field configures threshold of histogram bin 11 and bin 12
HIST_SEG_10_11

this field configures threshold of histogram bin 10 and bin 11
HIST_SEG_9_10

this field configures threshold of histogram bin 9 and bin 10
HIST_SEG_8_9

this field configures threshold of histogram bin 8 and bin 9

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data